Lab 10: NMOS/FET & Digital Logic

Materials:

Heathkit

2N7000 Transistor

270Ω Resistor

 

 

 

 

Wire Jumper Kit

 

 

 

 

 

 

LED

 

 

 

 

 

Procedure:

The goal of this lab is to construct various types of logic gates with 2N7000 NMOS transistors. I began as usual by forking the repository from Dr. Koch at 2012-Physics-308L-Lab-10-NMOS. Brandon had some difficulties with getting his to fork and I had an issue with cloning the repository to the desktop. After consulting with Dr. Koch, he checked the GitHub twitter feed and found that many people were having difficulties with GitHub at the moment. When I needed to compare my setup to Dr. Koch’s I instead just looked at the photos directly on GitHub.

Below is a schematic of the 2N7000 NMOS transistor found here.

1.

 

 

 

 

 

 

Not

For this section I constructed a NOT gate and then measured the drain source current and the voltage after the resistor. In the setup the green wire is connected to the gate of the transistor.

LED ON:

Drain Source Current: 0 mA (originally measured 12 mA b/c was picking up current going to LED)

Voltage after resistor: 4.953 V (2.044 V w/ LED wired in)

NOT Gate - Source: False / Output: True

 

 

 

 

 

 

 

 

 

 

LED OFF:

22 mA

.052 V

NOT Gate - Source: True / Output: False

 


 

 

 

 

 

 

 

 

The above voltage readings make sense because when the source is is true, then the output will be false. The NOT gate makes the output the opposite of the input.

2. NOT NOT

In this part of the lab we constructed a NOT NOT gate from two 2N7000 transistors, two 270 Ω resistors, and two LED.

Right LED ON/ Left LED OFF:

Original Resistor: 2.044 V (Due to LED draining)

New Resistor: .091 V

NOT NOT GATE- Source: False / Output: False

Right LED OFF/ Left LED ON:

Original Resistor: .082 V

New Resistor: 2.038 V

NOT NOT GATE- Source: True / Output: True

 

 

 

 

 

 

 

 

 

 

Through the use of two transistors it is possible to construct a NOT NOT gate. This is because the first transistor makes the output the opposite of the input. The second transistor makes its output the opposite of its input (the output of the first transistor. This results in the final output being the same as the initial input.

3. NAND

The final part of the lab instructed us to construct an NMOS NAND gate based on the following schematic found on wikipedia.

 

Below is a truth table for a NAND gate that can be found here.

 

In the setup yellow and green refer to the the wires leaded to the gates of each 2N7000 NMOS transistor.

Yellow 5 V/Green Ground:

Current: 0 A

Voltage: 5.006 V

NAND Gate- Green Source: False, Yellow Source: True / Output: True

Yellow Ground/Green Ground:

Current: 0 A

Voltage: 5.006 V

NAND Gate- Green Source: False, Yellow Source: False / Output: True

Yellow Ground/Green 5 V:

Current: 0 A

Voltage: 5.006 V

NAND Gate- Green Source: True, Yellow Source: False / Output: True

Yellow 5 V/ Green 5 V:

Current: 23 mA

Voltage: .145 before 1st transistor (.093 after first transistor)

NAND Gate- Green Source: True, Yellow Source: True / Output: False


 

 

 

 

 

 

 

 

 

The use of many of NAND gates in sequence would not be ideal because each successive transistor draws more and more current. This would be impractical in a real world setting.

 

Resources:

Dr. Koch

Wikipedia articles on NAND gates.

Opamp-electronics.com

dz863.com